Plasma display devices have been generally recognized as the display panel (flat display panel) of superior visibility. Further improvement efforts are being made towards still better picture quality of higher definition capability and still larger display sizes.
The plasma display devices can be divided into an AC type and a DC type in terms of the driving method, and a surface discharge type and an opposed discharge type in terms of the discharge pattern. Because of advantages in offering a higher resolution display and implementing larger display sizes, as well as the ease of manufacture, those plasma display devices of AC surface discharge type are forming the main stream in the industry.
The plasma display devices of the above-described type include a pair of transparent glass substrates and a discharge space formed between the glass substrates. A plasma display panel, which is the glass substrate on which a group of electrodes is disposed, (hereinafter, the plasma display panel is referred to as panel), a chassis for holding the panel, and a driver circuit block attached on the chassis for applying display signals to the panel constitute a panel module. The panel module is encased to complete a finished plasma display device.
Structure of the display panel of plasma display device is described with reference to FIG. 8. As shown in FIG. 8, display electrode 2, which is a pair formed of scan electrode and sustain electrode, is provided for a plurality of lines in a stripe pattern on transparent front glass substrate 1. Group of the display electrodes is covered with dielectric layer 3, and protection film 4 is provided to protect the dielectric layer.
On the surface of back board 5, which is disposed opposed to front board 1; address electrode 7 covered with overcoat layer 6 is provided for a plurality of lines in a stripe pattern perpendicularly to display electrode 2, which display electrode being formed of a scan electrode and a sustain electrode. On overcoat layer 6, a plurality of barrier ribs 8 is provided in parallel to address electrode 7 so that one barrier rib is locating at each of the places between address electrodes 7. Barrier rib 8 at its side-wall surfaces and the surface of overcoat layer 6 are covered with phosphor layer 9.
Board 1 and board 5 are disposed opposed, and sealed around the circumference so that display electrode 2 consisting of a scan electrode and a sustain electrode is at right angles to address electrode 7, and micro discharge spaces are provided in between the opposing display electrode 2 and address electrode 7. The discharge space is filled with one of discharge gases among the group of helium, neon, argon and xenon gases, or a mixture thereof. Discharge space is divided by barrier ribs 8 into a plurality of sections to provide a plurality of individual discharge cells, each of the individual discharge cells having display electrode 2 and address electrode 7 disposed crosswise perpendicularly. The individual discharge cells are provided with phosphor layer 9; one cell with red phosphor, the next cell with green phosphor and the third cell with blue phosphor, in the order.
FIG. 9 shows layout arrangement of the electrodes in the panel. As illustrated in FIG. 9, the scan electrodes and sustain electrodes, and address electrodes are disposed in a matrix, M rows by N columns. Scan electrodes SCN1–SCNM as well as sustain electrodes SUS1–SUSM are provided for M rows, whereas address electrodes D1–DN are provided for N columns.
In the panel of the above-described electrode structure, when a pulse is applied between an address electrode and a scan electrode, an address discharge takes place between the address electrode and the scan electrode; thus a discharge cell is selected. A cyclically reversing sustain pulse applied between the scan electrode and the sustain electrode produces a sustain discharge between the scan electrode and the sustain electrode. A certain specific display is generated through the above procedures.
FIG. 10 shows a plasma display device which includes the above panel; the drawing is used to show the layout arrangement how the main circuit boards are disposed. FIG. 12 is an electrically equivalent circuit diagram representing the above plasma display device. As shown in FIG. 10, panel 11 is glued to supporting board 12 for ensuring a certain mechanical strength. Now, reference is made to FIG. 12; panel 11's scan electrode group 11a is connected to sustain circuit board 14 via flexible connector board 13, while sustain electrode group 11b is connected to sustain circuit board 15 via flexible connector board 13.
Sustain circuit board 14 is mounted with switching elements 16, 17 for driving panel 11 and smoothing capacitor 18 for supplying the pulse current. Sustain circuit board 15 is mounted with switching elements 19, 20 for driving panel 11 and smoothing capacitor 21 for supplying the pulse current.
Sustain circuit boards 14, 15 are mechanically attached to conductive board 23 by means of respective conductive supporting members 22, and are electrically connected too. Further, sustain circuit boards 14, 15 are connected with power supply circuit 24 via wiring members 25, 26; sustain circuit boards 14, 15 are supplied with a voltage from power supply circuit 24.
In the above plasma display device, sustain pulse is outputted from sustain circuit board 14 and sustain circuit board 15 alternately to be applied on the scan electrode group and the sustain electrode group, as shown in FIG. 11. In this way, panel 11 is supplied with driving current.
The above-described technology has been disclosed in Japanese Patent No. 2807672.
In the above described conventional plasma display device, driving current proceeds along the route shown in FIG. 12. Term t1 represents a term for applying a sustain pulse on scan electrode group 11a. The driving current proceeds from the positive electrode of smoothing capacitor 18 to panel 11 via switching element 16. From panel 11, the driving current further proceeds to switching element 20 and to conductive board 23, and returns to smoothing capacitor 18, or the starting point, at the negative electrode.
Term t2 represents a term for applying a sustain pulse on sustain electrode group 11b. The driving current proceeds from the positive electrode of smoothing capacitor 18 to panel 11 via switching element 19. From panel 11, the driving current further proceeds to switching element 17 and to conductive board 23, and returns to smoothing capacitor 18, or the starting point, at the negative electrode. Referring to FIG. 12, there exists capacitance component C in each of the discharge cells of panel 11, and parasitic inductance L1–L15 at a number of constituent members.
As FIG. 12 shows, there are parasitic inductance L1–L15 in the current path formed of panel 11, sustain circuit boards 14, 15 and conductive board 23. As the result, when there is a driving current of great di/dt value during the sustain operation for panel 11, it causes a large ringing phenomenon at the starting moment of the driving current in the voltage waveform to be applied on the electrode group of panel 11, as shown in FIG. 11. This results in a lowered voltage applied on panel 11, narrowing a margin in the operating voltage of panel 11.